wy_qcos.transpiler.cmss.mapping.na.zac package

Subpackages

Submodules

wy_qcos.transpiler.cmss.mapping.na.zac.na_zac_mapping module

class wy_qcos.transpiler.cmss.mapping.na.zac.na_zac_mapping.NA_ZAC_Route

基类：ABC

prepare_data(qbit_num, gates, qpu_configs)

Prepare QPU configuration, gates and qubit num, build topo graph.

Description:

This method sets up internal data structures: - stores qpu_config, storage and operate areas - constructs an adjacency graph (ag) restricted to operate_area - precomputes all-pairs shortest path lengths on the operate graph - initializes scheduling lists and result container

参数:

  • qbit_num (int) -- Number of logical qubits.

  • gates (list) -- List of gate objects (IR).

  • qpu_configs -- QPU configuration. Expected keys: - "storage_area": iterable of storage locations - "operate_area": iterable of operate locations - "coupler_map": mapping of couplers - "readout_error": dict of readout errors (used later)

抛出:

MappingException -- If storage area size is smaller than qbit_num.

scheduling()

ASAP scheduling (As-Soon-As-Possible) for the given gates IR.

This scheduler groups gates into time stages respecting device constraints:

  • single-qubit gates can be scheduled on their qubit's earliest available time.

  • two-qubit gates need a pair of operate-area atoms (Rydberg pair),and the number of parallel two-qubit gates per stage is limited by the number of available operate-area coupler edges

It builds:

  • self.gate_scheduling_list: list of gate-lists per stage

返回:

list of measurement gate objects encountered (measure operations).

返回类型:

list

asap()

Scheduling 2-bit gate use asap strategy.

collect_reuse_qubit()

Collect reuse qubits.

Description:

Collect qubits that will remain in Rydberg zone between two Rydberg stages.

routing_asap(mapping, measure)

Convert the mapping plan into a sequence of Move and gates.

Description:

For each stage (except initial), create Move operations for atoms whose positions changed compared to previous stage. Then insert scheduled gates for that stage and finally append measurement operations (with updated physical positions).

参数:

  • mapping (list[dict]) -- mapping plan across stages.

  • measure (list) -- list of measurement gate objects collected

  • scheduling. (during)

返回:

list of operations(Move and gate objects)ready for execution.

返回类型:

mapping_res (list)

execute_with_order()

Run scheduling, mapping and routing to produce final op list.

Description:
Workflow:

  1. scheduling() to generate gate stages and measure ops

  2. collect_reuse_qubit() collect the reuse qubit for next stage

  3. SAPlacer.run() to find a inital mapping plan use sa

  4. VertexMatchingPlacer.run() to place qubit for every stage

  5. routing_asap() to create Move and gate execution sequence

返回:

ordered list of operations (Move and gates) map- ping logical qubits to physical qpu positions ready for execution.

返回类型:

mapping_res(list)

Module contents